Temperature characteristics of a simple current mirror on silicon high-voltage nLDMOS with a large DRIFT area
- Authors: Novoselov A.S.1, Gusev M.R.1, Masal’skii N.V.1
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Affiliations:
- Scientific Research Institute for System Analysis of the National Research Centre “Kurchatov Institute”
- Issue: Vol 54, No 3 (2025)
- Pages: 241-250
- Section: INSTRUMENTATION
- URL: https://vestnik.nvsu.ru/0544-1269/article/view/689386
- DOI: https://doi.org/10.31857/S0544126925030069
- EDN: https://elibrary.ru/PXKCDY
- ID: 689386
Cite item
Abstract
The results of a study of the temperature characteristics of a simple current mirror on high-voltage SOI nLDMOS transistors with a large drift area with topological norms of 0.5 microns in an extended range of external temperatures are discussed. The characteristics of a simple current mirror at temperatures of –60, 25, 125 °C have been experimentally studied. A mathematical model of a high-voltage nLDMOS transistor with a large DRIFT region has been developed for static operation in the field of high drain voltages and a wide range of ambient temperatures. Based on the results of experimental and numerical studies, a temperature range has been established in which the transfer characteristic of the current mirror retains linearity. It is 300 °C from –110 to 190 °C in the control voltage range from 25 to 55 V. In the same temperature range, the transmission coefficient (specularity) depends linearly on the input current level. Based on the data obtained, the conditions for determining the SOA of a simple current mirror on SOI LDMOS transistors are formulated.
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About the authors
A. S. Novoselov
Scientific Research Institute for System Analysis of the National Research Centre “Kurchatov Institute”
Author for correspondence.
Email: volkov@niisi.ras.ru
Russian Federation, Moscow
M. R. Gusev
Scientific Research Institute for System Analysis of the National Research Centre “Kurchatov Institute”
Email: volkov@niisi.ras.ru
Russian Federation, Moscow
N. V. Masal’skii
Scientific Research Institute for System Analysis of the National Research Centre “Kurchatov Institute”
Email: volkov@niisi.ras.ru
Russian Federation, Moscow
References
- Razavi B. Design of Analog CMOS Integrated Circuits. McGraw-Hill International Edition, 782, 2001, ISBN: 978-0-07-252493-2.
- Gray P.R., Hurst P.J., Lewis S.H., Meyer R.G. Analysis and Design of Analog Integrated Circuits. J. Wiley & Sons, 4th edition, 889, 2001, ISBN: 978-0471321682
- Pozar D.M. Microwave Engineering, 3rd ed. New York: Wiley, 728, 2005, ISBN: 9788126510498
- Gregorian R. Introduction to CMOS Op-Amps and Comparators. J. Wiley & Sons, 360, 1999, ISBN: 9780471317784
- Lan M.F., Tammineedi A., Geiger R. Current mirror layout strategies for enhancing matching performance // Analog Integrated Circuits and Signal Processing. 2001. V. 28. P. 9–26. https://doi.org/10.1023/A:1011237602078
- Bushnell M.L, Agrawal V.D. Essentials of electronic testing for digital, memory and mixed-signal VLSI circuits. Springer, 690. 2000. ISBN: 9780792379911
- Souliotis G., Haritantis I. Current-mode filters based on current mirror arrays // Int. J. Circuit Theory Appl. 2008. V. 36. P. 173–183. https://doi.org/10.1002/cta.419
- Tehranipoor M.M., Guin U., Forte D. Counterfeit Integrated Circuits: Detection and Avoidance. Springer, 289, 2015. ISBN: 978-3319118239
- Senani R., Bhaskar D., Singh A.K., Singh V.K. Current Feedback Operational Amplifiers and Their Applications. New York, NY, USA: Springer, 249, 2013. ISBN: 978-1461451877
- Theeuwen S.J.C.H., Qureshi J.H. LDMOS technology for RF power amplifiers // IEEE Trans. on Microwave Theory and Techniques (special issue on Power Amplifiers) // 2012. V. 60. Issue 6. Part 2. P. 1755–1763. https://doi.org/10.1109/TMTT.2012.2193141
- International Technology Roadmap for Semiconductors (ITRS) Interconnect, 2020 Edition. [Online] Available: https://irds.ieee.org/editions/2020 (data access 22.06.2024)
- Rumyantsev S.V., Novoselov A.S., Masalsky N.V. Study of the effect of self-heating in high-voltage SOI transistor with a large drift region // Russian Microelectronics. 2022. V. 51. № 5. P. 325–333. https://doi.org/ 10.1134/S1063739722050080
- Aggarwal B., Gupta M., Gupta A.K. A comparative study of various current mirror configurations: Topologies and characteristics // Microelectron. J. 2016. V. 53. P. 134–155. https://doi.org/10.1016/j.mejo.2016.04.015
- Guin U, Forte D, Tehranipoor M. Design of accurate low-cost on-chip structures for protecting integrated circuits against recycling // IEEE Trans Very Large Scale Integr (VLSI) Syst. 2016. V. 24. P. 1233–1246. https://doi.org/10.1109/TVLSI.2015.2466551
- Baker R.J. CMOS: Circuit Design, Layout, and Simulation. IEEE Press Series on Microelectronic Systems, 1208, 2010. ISBN: 9780470881323
- Nanoelectronics: Devices, Circuits and Systems. Editor by Brajesh Kumar Kaushik. Elsevier, 476, 2018. ISBN: 9780128133545
- Mukherjee C., Ardouin B., Dupuy J-Y.,Nodjiadjim V., Riet M., Zimmer T. Reliability-aware circuit design methodology for beyond-5G communication systems // IEEE Trans. Dev. Mat. Reliab.2017. V. 17. No. 3. P. 490–506. https://doi.org/10.1109/TDMR.2017.2710303
- Jindal C., Pandey R. A high output resistance, wide bandwidth, and low input resistance current mirror using flipped voltage follower cell // Int. J. Circuit Theory Appl. 2021. V. 49. P. 3286–3301. https://doi.org/10.1002/cta.3085
- Aggarwal B. Novel current mirrors based on folded flipped voltage follower configuration // Wireless Personal Communications. 2022. V. 123. P. 645–653. https://doi.org/10.1007/s11277-021-09150-3
- Huang J., Wang C., Zhou T., Lu W., Zhao Y., Liu Y., Li Y. A shifting current mirror driver circuit for electrical impedance tomography applications // IEEE Trans. Circuits Syst. II Express Briefs. 2023. V. 70. P. 3832–3836. https://doi.org/10.1109/TCSII.2023.3288909
- Kumngern M., Khateb F., Kulej T. A Novel multiple-input single-output current-mode shadow filter and shadow oscillator using current-controlled current conveyors // Circuits Syst. Signal Process. 2024. V. 43. P. 5438–5462. https://doi.org/10.1007/s00034-024-02729-8
- de Jong M.J., Salm C., Schmitz J. Effect of ambient on the recovery of hot-carrier degraded devices // In Proceedings of the 2020 IEEE International Reliability Physics Symposium (IRPS), Dallas, TX, USA, 28 April–3 May 2020. P. 1–6. https://doi.org/10.1109/IRPS45951.2020.9129540
- Novoselov A.S., Masalsky N.V. Influence of hot carrier degradation on the characteristics of a high-voltage SOI transistor with a large drift region // Russian Microelectronics. 2023. V. 52. № 5. P. 411–418. https://doi.org/10.1134/s1063739723700580
- Novoselov A.S., Gusev M.R., Masal’skii N.V. Temperature dependencies of the breakdown voltage of a high-voltage SOI LDMOS transistor // Russian Microelectronics. 2024. V. 53. № 5. P. 456–463, https://doi.org/10.1134/s1063739724600547
- Fayyaz A., Castellazzi A. High temperature pulsed-gate robustness testing of SiC power MOSFETs // Microelectronics Reliability. 2015. V. 55. Issues 9-10. P. 1724–1728. https://doi.org/10.1016/j.microrel.2015.06.141
- Shrivastava A., Pandey R., Jindal C. Low-voltage flipped voltage follower cell based current mirrors for high frequency applications // Wireless Personal Communication. 2020. V. 111. P. 143–161. https://doi.org/10.1007/s11277-019-06849-2
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